 Joris van Rantwijk
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f5d027cecc
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Use U-Boot SPL instead of Xilinx FSBL
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2024-09-19 21:08:22 +02:00 |
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Joris van Rantwijk
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5b21d0fb26
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Map only 4k for FPGA registers
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2024-08-31 15:31:19 +02:00 |
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Joris van Rantwijk
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3808d1051a
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Fix FPGA register range and DMA buffer in device tree
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2024-08-02 20:58:50 +02:00 |
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Joris van Rantwijk
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f8ba7bc57b
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Use identical devicetree for U-Boot and Linux
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2024-01-07 17:30:17 +01:00 |
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Joris van Rantwijk
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84e6e9ef39
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Rework U-Boot config and devicetree
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2024-01-07 01:06:45 +01:00 |
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Joris van Rantwijk
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2c23fa705d
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Add devicetree (work in progress)
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2024-01-07 00:52:36 +01:00 |