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redpitaya-puzzlefw
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Alternative, unofficial firmware for the Red Pitaya
41 Commits 1 Branch 1 Tag 957 KiB
VHDL 46.5%
C++ 36.2%
Shell 7.9%
Tcl 7.5%
C 1.7%
Other 0.2%
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Joris van Rantwijk eb1cd6219f Scale up DMA buffers inside FPGA 
Analog data buffer to 16k records.
Time tagger data buffer to 4k records.
 		2024-08-31 13:15:28 +02:00
fpga Scale up DMA buffers inside FPGA 2024-08-31 13:15:28 +02:00
os Add timetagger logic 2024-08-30 23:04:02 +02:00