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redpitaya-puzzlefw
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51 Commits 1 Branch 2 Tags 1,000 KiB
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4 Commits

Author SHA1 Message Date
Joris van Rantwijk f5d027cecc Use U-Boot SPL instead of Xilinx FSBL 2024-09-19 21:08:22 +02:00
Joris van Rantwijk b5c7ddaff3 Switch to Xilinx Linux kernel 
The Xilinx Linux kernel supports uploading FPGA bitstreams from Linux.
 2024-01-12 19:16:02 +01:00
Joris van Rantwijk 84e6e9ef39 Rework U-Boot config and devicetree 2024-01-07 01:06:45 +01:00
Joris van Rantwijk f198d12675 Scripts for Linux kernel 2024-01-07 00:51:38 +01:00