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vhdl-prng
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4 Commits

Author SHA1 Message Date
Joris van Rantwijk 500d8e8b2a Minor code cleanup for MT19937 and improve testbench. 
* Optimized seeding strategy now synthesizes for Spartan 6 at 300 MHz.
 2016-11-12 22:40:59 +01:00
Joris van Rantwijk 46409ff163 Another possible improvement of MT19937 timing. 2016-11-12 21:42:50 +01:00
Joris van Rantwijk c2142a0c09 Refactor MT19937 RNG: 
* Change port interface towards valid/ready stream concept.
 * Build 3-stage pipeline into initialization to hopefully improve timing.
 * TODO : carefully test if initialization is correct in all scenarios
 * TODO : synthesis run to see if timing is now reasonable
 2016-10-21 22:39:51 +02:00
Joris van Rantwijk 5303c34431 Initial commit: 
* Xoroshiro128+ (works, tested)
 * MT19337 (work in progress)
 * Test benches
 * Reference C code.
 2016-10-21 11:31:26 +02:00