redpitaya-puzzlefw/fpga/vivado
Joris van Rantwijk 491d66dcb3 Add timetagger logic to Vivado project 2024-09-21 20:20:36 +02:00
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redpitaya_puzzlefw.srcs/sources_1/bd/puzzlefw Update block design and Vivado project 2024-08-27 22:40:01 +02:00
nonproject.tcl Add timetagger logic 2024-08-30 23:04:02 +02:00
redpitaya_puzzlefw.xpr Add timetagger logic to Vivado project 2024-09-21 20:20:36 +02:00