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joris
/
redpitaya-puzzlefw
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3fff60832f
redpitaya-puzzlefw
/
fpga
/
vivado
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Joris van Rantwijk
3fff60832f
Clean up FPGA reset
2024-10-05 11:20:34 +02:00
..
redpitaya_puzzlefw.srcs/sources_1/bd
/puzzlefw
Clean up FPGA reset
2024-10-05 11:20:34 +02:00
nonproject.tcl
Generate FPGA datasheet report
2024-10-04 23:03:16 +02:00
redpitaya_puzzlefw.xpr
Add timetagger logic to Vivado project
2024-09-21 20:20:36 +02:00