joris
/
redpitaya-puzzlefw
1
0
Fork 0
Code Issues Pull Requests Releases Activity
redpitaya-puzzlefw/fpga/vivado
History
Joris van Rantwijk 5d00a2e792 Read digital input signals 2024-08-27 23:48:12 +02:00
..
redpitaya_puzzlefw.srcs/sources_1/bd/puzzlefw Update block design and Vivado project 2024-08-27 22:40:01 +02:00
nonproject.tcl Read digital input signals 2024-08-27 23:48:12 +02:00
redpitaya_puzzlefw.xpr Update block design and Vivado project 2024-08-27 22:40:01 +02:00