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redpitaya-puzzlefw
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Alternative, unofficial firmware for the Red Pitaya
35 Commits 2 Branches 0 Tags 951 KiB
VHDL 42.1%
C++ 32.8%
C 10.9%
Shell 7.2%
Tcl 6.8%
Other 0.2%
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Joris van Rantwijk 209da7065a Set I/O timing constraints 
Set input timing constraints on digital inputs.
Set output timing constraints on LED signals.
 		2024-08-29 10:01:31 +02:00
fpga Set I/O timing constraints 2024-08-29 10:01:31 +02:00
os Read digital input signals 2024-08-27 23:48:12 +02:00