|  Joris van Rantwijk | 4814275863 | Move trigger inputs to exp_p_io[0 .. 3] These inputs are also accessible through the logic analyzer module. | 2024-10-10 22:02:44 +02:00 | 
				
					
						|  Joris van Rantwijk | bdefc835b6 | Capture digital input via IDDR | 2024-10-08 17:34:05 +02:00 | 
				
					
						|  Joris van Rantwijk | 6a39840821 | Add support for 4-input Red Pitaya | 2024-10-08 08:49:34 +02:00 | 
				
					
						|  Joris van Rantwijk | 6016d2d706 | Adjust timing of capturing ADC samples | 2024-10-06 22:20:27 +02:00 | 
				
					
						|  Joris van Rantwijk | 1cbe2cc0c9 | Set PULLDOWN on digital inputs | 2024-08-29 10:03:00 +02:00 | 
				
					
						|  Joris van Rantwijk | 209da7065a | Set I/O timing constraints Set input timing constraints on digital inputs.
Set output timing constraints on LED signals. | 2024-08-29 10:01:31 +02:00 | 
				
					
						|  Joris van Rantwijk | a5f4e25c76 | Add Vivado project | 2024-08-03 12:55:15 +02:00 |