 Joris van Rantwijk
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4814275863
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Move trigger inputs to exp_p_io[0 .. 3]
These inputs are also accessible through the logic analyzer module.
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2024-10-10 22:02:44 +02:00 |
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Joris van Rantwijk
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bdefc835b6
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Capture digital input via IDDR
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2024-10-08 17:34:05 +02:00 |
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Joris van Rantwijk
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6016d2d706
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Adjust timing of capturing ADC samples
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2024-10-06 22:20:27 +02:00 |
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Joris van Rantwijk
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1cbe2cc0c9
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Set PULLDOWN on digital inputs
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2024-08-29 10:03:00 +02:00 |
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Joris van Rantwijk
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209da7065a
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Set I/O timing constraints
Set input timing constraints on digital inputs.
Set output timing constraints on LED signals.
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2024-08-29 10:01:31 +02:00 |
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Joris van Rantwijk
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a5f4e25c76
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Add Vivado project
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2024-08-03 12:55:15 +02:00 |