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redpitaya-puzzlefw
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25 Commits 2 Branches 0 Tags 539 KiB
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3 Commits

Author SHA1 Message Date
Joris van Rantwijk 5632ffc6b2 Add VHDL for DMA write channel 2024-08-09 20:16:53 +02:00
Joris van Rantwijk f58343fc0f Test interrupt from FPGA 2024-08-03 20:18:02 +02:00
Joris van Rantwijk 6b5f2967ac Add VHDL code 2024-08-02 21:47:58 +02:00