joris
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redpitaya-puzzlefw
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122 Commits 2 Branches 0 Tags 951 KiB
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4 Commits

Author SHA1 Message Date
Joris van Rantwijk 96090ac31e Add timetagger logic 2024-08-30 23:04:02 +02:00
Joris van Rantwijk 716d16e6a3 Test analog acquisition chain 2024-08-26 21:31:55 +02:00
Joris van Rantwijk 4abc2ee165 Rework DMA to support single-beat transfers 2024-08-24 23:04:35 +02:00
Joris van Rantwijk 5632ffc6b2 Add VHDL for DMA write channel 2024-08-09 20:16:53 +02:00