Reset FPGA via GPIO during boot

sw/buildroot_overlay/etc/init.d/S90program_fpga.sh

@@ -30,6 +30,13 @@ start() {
         exit 1
     fi
 
+    # Drive internal GPIO line 0 low to reset FPGA.
+    # Note: EMIO GPIO line n is gpio (n + 54) in Linux.
+    gpioset 0 54=0
+
+    # Drive internal GPIO line 2 high to enable ADC duty cycle stabilizer.
+    gpioset 0 56=0
+
     # Program FPGA.
     echo "Programming FPGA ..."
     echo 0 > /sys/class/fpga_manager/fpga0/flags
@@ -37,6 +44,10 @@ start() {
 
     # Wait until FPGA programmed.
     sleep 5
+
+    # Drive internal GPIO line 0 high to release FPGA reset.
+    gpioset 0 54=1
+    sleep 1
 }
 
 case "$1" in

sw/buildroot_overlay/etc/init.d/S91puzzlefw_driver.sh

@@ -14,6 +14,14 @@ start() {
         exit 1
     fi
 
+    # Check that the FPGA has finished reset.
+    # If the FPGA is in reset, loading the driver will crash the system.
+    reset_done="$(gpioget 0 55)"
+    if [ "$reset_done" -ne 1 ]; then
+        echo "ERROR: FPGA in reset" >&2
+        exit 1
+    fi
+
     # Load module.
     echo "Loading puzzlefw driver ..."
     insmod /opt/puzzlefw/driver/puzzlefw.ko