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redpitaya-puzzlefw
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Set PULLDOWN on digital inputs

This commit is contained in:
Joris van Rantwijk 2024-08-29 09:59:36 +02:00
parent 8ccfff2264
commit 1cbe2cc0c9
1 changed files with 6 additions and 0 deletions
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6
fpga/constraints/red_pitaya.xdc
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@ -169,6 +169,12 @@ set_property PACKAGE_PIN M15 [get_ports {exp_n_io[7]}]
#set_property PULLUP TRUE [get_ports {exp_p_io[7]}] #set_property PULLUP TRUE [get_ports {exp_p_io[7]}]
#set_property PULLUP TRUE [get_ports {exp_n_io[7]}] #set_property PULLUP TRUE [get_ports {exp_n_io[7]}]
# Pull down digital inputs.
set_property PULLDOWN TRUE [get_ports {exp_p_io[0]}]
set_property PULLDOWN TRUE [get_ports {exp_n_io[0]}]
set_property PULLDOWN TRUE [get_ports {exp_p_io[1]}]
set_property PULLDOWN TRUE [get_ports {exp_n_io[1]}]
#### SATA connector #### SATA connector
#set_property IOSTANDARD LVCMOS18 [get_ports {daisy_p_o[*]}] #set_property IOSTANDARD LVCMOS18 [get_ports {daisy_p_o[*]}]
#set_property IOSTANDARD LVCMOS18 [get_ports {daisy_n_o[*]}] #set_property IOSTANDARD LVCMOS18 [get_ports {daisy_n_o[*]}]