diff --git a/fpga/constraints/red_pitaya.xdc b/fpga/constraints/red_pitaya.xdc
index d90144e..72152ee 100644
--- a/fpga/constraints/red_pitaya.xdc
+++ b/fpga/constraints/red_pitaya.xdc
@@ -169,6 +169,12 @@ set_property PACKAGE_PIN M15 [get_ports {exp_n_io[7]}]
 #set_property PULLUP   TRUE [get_ports {exp_p_io[7]}]
 #set_property PULLUP   TRUE [get_ports {exp_n_io[7]}]
 
+# Pull down digital inputs.
+set_property PULLDOWN TRUE [get_ports {exp_p_io[0]}]
+set_property PULLDOWN TRUE [get_ports {exp_n_io[0]}]
+set_property PULLDOWN TRUE [get_ports {exp_p_io[1]}]
+set_property PULLDOWN TRUE [get_ports {exp_n_io[1]}]
+
 #### SATA connector
 #set_property IOSTANDARD LVCMOS18 [get_ports {daisy_p_o[*]}]
 #set_property IOSTANDARD LVCMOS18 [get_ports {daisy_n_o[*]}]