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redpitaya-puzzlefw
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Fix 2-channel mode for 4-channel board

This commit is contained in:
Joris van Rantwijk 2024-10-09 23:06:12 +02:00
parent bdefc835b6
commit 0594016924
2 changed files with 2 additions and 2 deletions
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2
fpga/rtl/acquisition_stream.vhd
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@ -141,7 +141,7 @@ begin
-- Latch second sample data word. -- Latch second sample data word.
if (num_channels > 2) and (sample_valid = '1') then if (num_channels > 2) and (sample_valid = '1') then
v.sample_pending := '1'; v.sample_pending := ch4_mode;
v.sample_data := sample_data(2 to num_channels - 1); v.sample_data := sample_data(2 to num_channels - 1);
end if; end if;

2
fpga/rtl/puzzlefw_pkg.vhd
View File

@ -96,7 +96,7 @@ package puzzlefw_pkg is
-- Firmware info word. -- Firmware info word.
constant fw_api_version: natural := 1; constant fw_api_version: natural := 1;
constant fw_version_major: natural := 0; constant fw_version_major: natural := 0;
constant fw_version_minor: natural := 13; constant fw_version_minor: natural := 14;
constant fw_info_word: std_logic_vector(31 downto 0) := constant fw_info_word: std_logic_vector(31 downto 0) :=
x"4a" x"4a"
& std_logic_vector(to_unsigned(fw_api_version, 8)) & std_logic_vector(to_unsigned(fw_api_version, 8))