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Pseudo-Random Number Generators in VHDL
1 Commit 1 Branch 0 Tags 84 KiB
VHDL 82.1%
C 8.3%
C++ 7.7%
Makefile 1.9%
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Joris van Rantwijk 5303c34431 Initial commit: 
* Xoroshiro128+ (works, tested)
 * MT19337 (work in progress)
 * Test benches
 * Reference C code.
 		2016-10-21 11:31:26 +02:00
refimpl Initial commit: 2016-10-21 11:31:26 +02:00
rtl Initial commit: 2016-10-21 11:31:26 +02:00
sim Initial commit: 2016-10-21 11:31:26 +02:00