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Add Spartan-7 synthesis results for Trivium

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Joris van Rantwijk 2020-08-11 20:20:52 +02:00
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README.txt
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@ -120,7 +120,9 @@ Period: unknown, depends on seed
FPGA resources: only general logic (AND, XOR ports, registers) FPGA resources: only general logic (AND, XOR ports, registers)
Synthesis results: 202 LUTs, 332 registers on Spartan-6 (32 bits output) Synthesis results: 202 LUTs, 332 registers on Spartan-6 (32 bits output)
145 LUTs, 332 registers on Spartan-7 (32 bits output)
Timing results: 380 MHz on Spartan-6 LX45-3 (32 bits output) Timing results: 380 MHz on Spartan-6 LX45-3 (32 bits output)
440 MHz on Spartan-7 S25 (32 bits output)
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