Add Spartan-7 synthesis results for Trivium
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@ -120,7 +120,9 @@ Period: unknown, depends on seed
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FPGA resources: only general logic (AND, XOR ports, registers)
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Synthesis results: 202 LUTs, 332 registers on Spartan-6 (32 bits output)
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145 LUTs, 332 registers on Spartan-7 (32 bits output)
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Timing results: 380 MHz on Spartan-6 LX45-3 (32 bits output)
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440 MHz on Spartan-7 S25 (32 bits output)
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Code organization
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