joris
/
vhdl-prng
1
0
Fork 0
Code Pull Requests Releases Activity

Rename toplevel stub entity for xoroshiro128+

This commit is contained in:
Joris van Rantwijk 2020-08-13 16:29:31 +02:00
parent fc70f906b3
commit 3acd8b3043
1 changed files with 3 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
synth/top_xoroshiro.vhdl → synth/top_xoroshiro128plus.vhdl
View File

@ -2,16 +2,16 @@
library ieee; library ieee;
use ieee.std_logic_1164.all; use ieee.std_logic_1164.all;
entity topxs is entity top_xoroshiro128plus is
port ( port (
clk : in std_logic; clk : in std_logic;
rst : in std_logic; rst : in std_logic;
ready: in std_logic; ready: in std_logic;
valid: out std_logic; valid: out std_logic;
data: out std_logic_vector(63 downto 0) ); data: out std_logic_vector(63 downto 0) );
end topxs; end top_xoroshiro128plus;
architecture arch of topxs is architecture arch of top_xoroshiro128plus is
begin begin
inst_prng: entity work.rng_xoroshiro128plus inst_prng: entity work.rng_xoroshiro128plus