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redpitaya-puzzlefw
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Alternative, unofficial firmware for the Red Pitaya
61 Commits 2 Branches 0 Tags 539 KiB
VHDL 42.1%
C++ 32.8%
C 10.9%
Shell 7.2%
Tcl 6.8%
Other 0.2%
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Joris van Rantwijk 491d66dcb3 Add timetagger logic to Vivado project 2024-09-21 20:20:36 +02:00
doc Add register bit to show 4-channel support 2024-09-18 20:59:31 +02:00
fpga Add timetagger logic to Vivado project 2024-09-21 20:20:36 +02:00
sw Rename os to sw 2024-09-21 18:10:34 +02:00