joris
/
redpitaya-puzzlefw
1
0
Fork 0
Code Issues Pull Requests Releases Activity

Generate FPGA datasheet report

This commit is contained in:
Joris van Rantwijk 2024-10-04 23:03:16 +02:00
parent bd8273558c
commit d2b39354c8
1 changed files with 1 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
fpga/vivado/nonproject.tcl
View File

@ -80,6 +80,7 @@ report_drc -file output/post_route_drc.rpt
report_utilization -file output/post_route_utilization.rpt report_utilization -file output/post_route_utilization.rpt
report_timing_summary -file output/post_route_timing.rpt report_timing_summary -file output/post_route_timing.rpt
report_power -file output/post_route_power.rpt report_power -file output/post_route_power.rpt
report_datasheet -file output/post_route_datasheet.rpt
# Write .bit file. # Write .bit file.
write_bitstream -force output/puzzlefw_top.bit write_bitstream -force output/puzzlefw_top.bit