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Document digital input registers

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Joris van Rantwijk 2024-09-29 19:37:02 +02:00
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doc/fpga_firmware.md
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@ -265,6 +265,8 @@ The base address 0x43000000 must be added to obtain the absolute address on the
| 0x00031C | TT_DMA_STATUS | Status of DMA write stream for timetagger | | 0x00031C | TT_DMA_STATUS | Status of DMA write stream for timetagger |
| 0x000320 | TIMETAGGER_EN | Mask of enabled timetagger channels | | 0x000320 | TIMETAGGER_EN | Mask of enabled timetagger channels |
| 0x000324 | TIMETAGGER_MARK | Emit marker record in timetagger data | | 0x000324 | TIMETAGGER_MARK | Emit marker record in timetagger data |
| 0x000330 | DIG_SIMULATE | Simulate digital input |
| 0x000338 | DIG_SAMPLE | Current state of digital input signals |
| 0x000404 | LED_STATE | Control LEDs | | 0x000404 | LED_STATE | Control LEDs |
**Privileged registers** **Privileged registers**
@ -781,6 +783,23 @@ Emit marker record in timetagger data.
|---------|---------------|--------|-------------| |---------|---------------|--------|-------------|
| 0 | | WC | Write '1' to emit a marker record in the timetagger data stream. | | 0 | | WC | Write '1' to emit a marker record in the timetagger data stream. |
### 0x000330: DIG_SIMULATE
Simulate digital input.
| Bits | Field name | Access | Description |
|---------|---------------|--------|-------------|
| 3 : 0 | dig_sim_state | RW | Simulated digital input state. |
| 8 | dig_sim_en | RW | '1' to use simulated digital input, '0' to use real input. |
### 0x000338: DIG_SAMPLE
Current state of digital input signals.
| Bits | Field name | Access | Description |
|---------|---------------|--------|-------------|
| 3 : 0 | dig_sample | RO | Digital input state. |
### 0x000404: LED_STATE ### 0x000404: LED_STATE
Control LEDs. Control LEDs.