Clean up FPGA build scripts

fpga/11_build_bitfile.sh

@@ -5,9 +5,25 @@ set -e
 . script_env
 setup_vivado
 
+rm -f puzzlefw_top.bit.bin redpitaya_puzzlefw.xsa
+
 ( cd vivado
   mkdir -p output
   stdbuf -oL vivado -mode batch -source nonproject.tcl | tee output/build_log.txt )
 
-cp -a vivado/output/puzzlefw_top.bit .
+rm -f vivado/output/puzzlefw_top.bit.bin
+
+cat >vivado/output/bitstream.bif <<EOF
+all:
+{
+	puzzlefw_top.bit
+}
+EOF
+
+( cd vivado/output
+  bootgen -image bitstream.bif -arch zynq -process_bitstream bin
+  )
+
+cp -a vivado/output/puzzlefw_top.bit.bin .
+cp -a vivado/output/redpitaya_puzzlefw.xsa .
 

fpga/make_binfile.sh

@@ -0,0 +1,30 @@
+#!/bin/bash
+
+set -e
+
+. script_env
+setup_vivado
+
+if [ ! -f "$1" ]; then
+    echo "Usage: $0 bitfile.bit" >&2
+    exit 1
+fi
+
+bitfile="$(basename "$1")"
+
+mkdir binfile_dir
+
+cp -a "$1" "binfile_dir/$bitfile"
+
+cat >"binfile_dir/bitstream.bif" <<EOF
+all:
+{
+	$bitfile
+}
+EOF
+
+( cd binfile_dir ; bootgen -image bitstream.bif -arch zynq -process_bitstream bin )
+
+cp -a "binfile_dir/${bitfile}.bin" .
+
+rm -r binfile_dir