Clean up generated files before FPGA build

fpga/11_build_bitfile.sh

@@ -1,18 +1,22 @@
 #!/bin/bash
 
 set -e
+set -o pipefail
 
 . script_env
 setup_vivado
 
 rm -f puzzlefw_top.bit.bin redpitaya_puzzlefw.xsa
+rm -rf vivado/redpitaya_puzzlefw.srcs/sources_1/bd/puzzlefw/ip
+rm -rf vivado/redpitaya_puzzlefw.srcs/sources_1/bd/puzzlefw/ipshared
+rm -rf vivado/redpitaya_puzzlefw.gen
+rm -rf vivado/output
+
+mkdir -p vivado/output
 
 ( cd vivado
-  mkdir -p output
   stdbuf -oL vivado -mode batch -source nonproject.tcl | tee output/build_log.txt )
 
-rm -f vivado/output/puzzlefw_top.bit.bin
-
 cat >vivado/output/bitstream.bif <<EOF
 all:
 {