Update test program
Add test register. Wait for 4k data blocks when possible.
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4abc2ee165
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131fe91c67
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@ -38,6 +38,7 @@
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#define REG_DMA_ADDR_PTR 0x0210
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#define REG_DMA_CHANNEL_CTRL 0x0214
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#define REG_DMA_INTR_CTRL 0x0218
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#define REG_TEST_DIVIDER 0x0408
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struct puzzlefw_context {
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@ -434,6 +435,9 @@ static void show_status(struct puzzlefw_context *ctx)
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v = puzzlefw_read_reg(ctx, REG_DMA_INTR_CTRL);
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printf(" dma_intr_ctrl = 0x%08x\n", v);
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v = puzzlefw_read_reg(ctx, REG_TEST_DIVIDER);
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printf(" test_divider = 0x%08x\n", v);
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}
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@ -494,8 +498,11 @@ static void blast_dma(struct puzzlefw_context *ctx)
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// Set invalid limit to keep the writer blasting.
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puzzlefw_write_reg(ctx, REG_DMA_ADDR_LIMIT, 0xffffffff);
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// Initialize and enable DMA writer.
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puzzlefw_write_reg(ctx, REG_DMA_CHANNEL_CTRL, 3);
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// Initialize DMA writer.
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puzzlefw_write_reg(ctx, REG_DMA_CHANNEL_CTRL, 2);
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// Enable DMA writer.
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puzzlefw_write_reg(ctx, REG_DMA_CHANNEL_CTRL, 1);
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struct timespec tp;
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tp.tv_sec = 10;
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@ -646,15 +653,15 @@ int transmit_dma_data(struct puzzlefw_context *ctx, int conn)
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// Maximum block size per TCP send() call.
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const uint32_t send_max_block = 65536;
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// When buffer is empty, sleep until this amount becomes available.
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// Sleep until this number of bytes is available in the buffer.
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const uint32_t wait_block_size = 4096;
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// Reserve this number of bytes in the buffer to avoid ambiguous pointers.
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const uint32_t pointer_margin = 1024;
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// When buffer is empty, sleep at most this duration.
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// Sleep at most this duration if there is insufficient data in the buffer.
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const int timeout_ms = 10;
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// Reserve this number of bytes in the buffer to avoid ambiguous pointers.
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const uint32_t pointer_margin = 4096;
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assert(ctx->dma_buf_size >= 2 * wait_block_size);
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assert(send_max_block % ctx->dma_transfer_size == 0);
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assert(wait_block_size % ctx->dma_transfer_size == 0);
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@ -681,8 +688,11 @@ int transmit_dma_data(struct puzzlefw_context *ctx, int conn)
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// Enable AXI DMA.
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puzzlefw_write_reg(ctx, REG_DMA_EN, 1);
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// Initialize and enable DMA writer.
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puzzlefw_write_reg(ctx, REG_DMA_CHANNEL_CTRL, 3);
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// Initialize DMA writer.
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puzzlefw_write_reg(ctx, REG_DMA_CHANNEL_CTRL, 2);
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// Enable DMA writer.
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puzzlefw_write_reg(ctx, REG_DMA_CHANNEL_CTRL, 1);
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uint32_t read_pointer = 0;
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int ret;
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@ -698,12 +708,14 @@ int transmit_dma_data(struct puzzlefw_context *ctx, int conn)
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break;
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}
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// Check for data in buffer.
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// Determine number of bytes available.
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uint32_t write_pointer = puzzlefw_read_reg(ctx, REG_DMA_ADDR_PTR);
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uint32_t navail = (write_pointer >= read_pointer) ?
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(write_pointer - read_pointer) :
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(ctx->dma_buf_size + write_pointer - read_pointer);
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if (write_pointer == read_pointer) {
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// Wait for new data.
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// Wait for enough data in the buffer, or timeout.
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if (navail < wait_block_size) {
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ret = wait_dma_data(ctx, conn,
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read_pointer,
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wait_block_size,
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@ -717,14 +729,14 @@ int transmit_dma_data(struct puzzlefw_context *ctx, int conn)
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break;
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}
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} else {
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write_pointer = puzzlefw_read_reg(ctx, REG_DMA_ADDR_PTR);
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}
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// Determine number of bytes available.
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// If the write pointer wrapped around the end of the buffer,
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// stop at the end of the buffer and process the rest in the next
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// pass through the loop.
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uint32_t navail =
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(write_pointer >= read_pointer) ?
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navail = (write_pointer >= read_pointer) ?
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(write_pointer - read_pointer) :
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(ctx->dma_buf_size - read_pointer);
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@ -764,11 +776,11 @@ int transmit_dma_data(struct puzzlefw_context *ctx, int conn)
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break;
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}
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// Wrap read pointer at end of buffer.
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if (read_pointer == ctx->dma_buf_size) {
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read_pointer = 0;
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}
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}
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}
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// Disable AXI DMA.
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puzzlefw_write_reg(ctx, REG_DMA_EN, 0);
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@ -848,6 +860,8 @@ int main(int argc, char **argv)
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int dmaclear = 0;
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int blastdma = 0;
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int server = 0;
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int set_divider = 0;
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int divider;
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if (argc == 2 && strcmp(argv[1], "show") == 0) {
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show = 1;
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@ -863,6 +877,9 @@ int main(int argc, char **argv)
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dmaclear = 1;
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} else if (argc == 2 && strcmp(argv[1], "blastdma") == 0) {
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blastdma = 1;
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} else if (argc == 3 && strcmp(argv[1], "divider") == 0) {
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set_divider = 1;
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divider = atoi(argv[2]);
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} else if (argc == 2 && strcmp(argv[1], "server") == 0) {
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server = 1;
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} else {
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@ -932,6 +949,10 @@ int main(int argc, char **argv)
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blast_dma(&ctx);
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}
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if (set_divider) {
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puzzlefw_write_reg(&ctx, REG_TEST_DIVIDER, divider);
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}
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if (server) {
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run_server(&ctx);
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}
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