2016-11-13 00:40:53 +01:00
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Pseudo-Random Number Generators in VHDL
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=========================================
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This library contains a number of pseudo-random number generators (PRNG)
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in synthesizable VHDL code.
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The PRNGs in this library are useful to generate noise in digital signal
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processing and to generate random numbers for monte-carlo simulations or
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for games.
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The VHDL code is portable and should run on any FPGA/synthesis platform,
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but the designs are somewhat optimized for Xilinx FPGAs.
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These PRNGs are a good alternative to linear feedback shift registers (LFSR).
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Although LFSRs are commonly used, their output exhibits strong correlations.
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Furthermore, correctly generating multi-bit random words with LFSRs is tricky.
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NOTE: None of the RNGs in this package are cryptographic random number
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generators. These generators are not suitable for cryptography.
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Xoroshiro128+ RNG
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------------------
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Xoroshiro128+ is an RNG algorithm developed in 2016 by David Blackman
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and Sebastiano Vigna. It is a further development of the Xorshift algorithm
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invented by George Marsaglia
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See also http://xoroshiro.di.unimi.it/
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This RNG passes many statistical tests. Its period, 2**128 - 1, is long
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compared to a typical LFSR, but much shorter than the Mersenne Twister.
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The output is 1-dimensionally equidistributed.
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The VHDL implementation produces 64 new random bits on every (enabled)
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clock cycle. It is quite efficient in terms of FPGA resources, but it
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does require a 64-bit adder.
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Output word length: 64 bits
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Seed length: 128 bits
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Period: 2**128 - 1
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FPGA resources: general logic and 64-bit adder
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Sythesis results: 194 LUTs, 192 registers on Spartan-6
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Timing results: 333 MHz on Spartan-6 LX45-3
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Mersenne Twister RNG
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--------------------
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The Mersenne Twister is an RNG algorithm developed in 1997 by
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Makoto Matsumoto and Takuji Nishimura. This library implements
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the most common variant of the algorithm, MT19937.
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See also M. Matsumoto, T. Nishimura, "Mersenne Twister: a 623-dimensionally
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equidistributed uniform pseudorandom number generator", ACM TOMACS, vol. 8,
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no. 1, 1998.
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2016-11-13 22:25:15 +01:00
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This RNG is very popular in software applications. It is relatively fast,
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passes many statistical tests and has an enormous period.
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2016-11-13 00:40:53 +01:00
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The VHDL implementation produces 32 new random bits on every (enabled)
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clock cycle. It uses a RAM block, 32 bits wide, 1024 elements deep,
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to store the RNG state.
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The most demanding part of the implementation is the seeding procedure.
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Seeding involves repeated multiplication by a 32-bit constant. This
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multiplication is implemented as a hand-coded series of shifts and adds
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when force_const_mul = true; the multiplication is left to the synthesizer
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when force_const_mul = false. The hand-coded variant is much more efficient
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on Xilinx Spartan-6, so the recommended setting is force_const_mul = true.
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After reset and after each reseeding, the RNG needs 2496 clock cycles
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to initialize its state. The RNG can not provide random data during this time.
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Output word length: 32 bits
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Seed length: 32 bits
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Period: 2**19937 - 1
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FPGA resources: RAM block, 32 bits x 1024 elements
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Sythesis results: 279 LUTs, 297 registers, 2x RAMB16 on Spartan-6
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Timing results: 300 MHz on Spartan-6 LX45-3
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Code organization
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-----------------
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rtl/ Synthesizable VHDL code
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rtl/rng_xoroshiro128plus.vhdl Implementation of Xoroshiro128+ RNG
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rtl/rng_mt19937.vhdl Implementation of Mersenne Twister RNG
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sim/ Test benches
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sim/Makefile Makefile for building test benches with GHDL
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sim/tb_xoroshiro128plus.vhdl Test bench for Xoroshiro128+ RNG
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sim/tb_mt19937.vhdl Test bench for Mersenne Twister RNG
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refimpl/ Reference software implementations of RNGs
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synth/ Top-level wrappers for synthesis testruns
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License
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-------
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Copyright (C) 2016 Joris van Rantwijk
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This VHDL library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public License
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s published by the Free Software Foundation; either version 2.1
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of the License, or (at your option) any later version.
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This library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with this library; if not, see
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<https://www.gnu.org/licenses/old-licenses/lgpl-2.1.html>
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This package contains a few support files which are distributed
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under Creative Commons CC0. This is explicitly and clearly marked
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in the files to which it applies.
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--
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