Joris van Rantwijk 5b72e7f3f3 * Start work on synthesizable tester for sin/cos core.		2016-04-16 22:56:42 +02:00
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sincos_gen.vhdl	* Further reduction of multiplier width.	2016-04-16 09:10:27 +02:00
sincos_gen_d18_p20.vhdl	* Reorganize comments at top of wrappers for sin/cos generator.	2016-04-16 22:16:20 +02:00
sincos_gen_d24_p26.vhdl	* Reorganize comments at top of wrappers for sin/cos generator.	2016-04-16 22:16:20 +02:00
test_sincos_serial.vhdl	* Start work on synthesizable tester for sin/cos core.	2016-04-16 22:56:42 +02:00