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vhdl-sincos-gen
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Sine/cosine function core in VHDL
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5b72e7f3f3
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Joris van Rantwijk
5b72e7f3f3
* Start work on synthesizable tester for sin/cos core.
2016-04-16 22:56:42 +02:00
rtl
* Start work on synthesizable tester for sin/cos core.
2016-04-16 22:56:42 +02:00
sim
* Add comment in simulation Makefile.
2016-04-16 22:18:41 +02:00
tools
* eval_sine_quality.py: Add Python program to evaluate sine waveform.
2016-04-16 09:09:28 +02:00