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vhdl-sincos-gen
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vhdl-sincos-gen
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Joris van Rantwijk
8bd2d389ef
Add Python program to test core via serial port.
2016-04-23 00:27:34 +02:00
..
eval_sine_quality.py
* Evaluate sine against non-phase-adjusted reference which is a little
2016-04-18 22:21:35 +02:00
test_sincos_serial.py
Add Python program to test core via serial port.
2016-04-23 00:27:34 +02:00