Sine/cosine function core in VHDL
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Joris van Rantwijk 12b896c2df Fix mistake in Taylor correction.
This improves accuracy, but there is probably room for further improvement by avoiding accumulation of rounding errors.
2016-04-11 23:21:25 +02:00
rtl Fix mistake in Taylor correction. 2016-04-11 23:21:25 +02:00
sim Full (all-input) test bench for sincos_gen_d18_p20. 2016-04-10 01:26:05 +02:00