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vhdl-sincos-gen
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4 Commits

Author SHA1 Message Date
Joris van Rantwijk ba096abf16 Make internal phase accuracy configurable. 
* Add generic "phase_extrabits" to set internal accuracy of phase remainder.
* Increase default value of phase_extrabits from 1 to 2.
 2016-04-20 23:46:24 +02:00
Joris van Rantwijk 5892955445 * Reorganize comments at top of wrappers for sin/cos generator. 2016-04-16 22:16:20 +02:00
Joris van Rantwijk 0685db9d92 Document latency of sincos core. 2016-04-10 01:27:24 +02:00
Joris van Rantwijk 8090886ab0 VHDL wrapper for sin/cos function with 18-bit sin/cos, 20-bit phase. 2016-03-24 23:34:20 +01:00