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vhdl-sincos-gen
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13 Commits

Author SHA1 Message Date
Joris van Rantwijk fe5dfa9133 Fix mistakes in changes related to phase_extrabits. 2016-04-20 23:46:42 +02:00
Joris van Rantwijk ba096abf16 Make internal phase accuracy configurable. 
* Add generic "phase_extrabits" to set internal accuracy of phase remainder.
* Increase default value of phase_extrabits from 1 to 2.
 2016-04-20 23:46:24 +02:00
Joris van Rantwijk 385c9f5ed2 * Finally found a way to describe the lookup table such that both 
ISE and Vivado infer a dual-port block RAM.
 2016-04-19 23:36:10 +02:00
Joris van Rantwijk 2ed074011e * Change description of lookup table to force inference of ROM block 
on Virtex-7 with Vivado.
 2016-04-19 23:36:10 +02:00
Joris van Rantwijk 8796491f37 * Further reduction of multiplier width. 
At this point it very slightly affects output quality.
  This change makes it possible to implement up to 24-bit sine generators
  using just 18x18-bit multipliers (i.e. Spartan-6).
 2016-04-16 09:10:27 +02:00
Joris van Rantwijk d2a948f34e * Fix mistake in 2nd order Taylor correction. 
* Fix mistake in testbench for 24-bit sine generator.
 2016-04-14 23:14:58 +02:00
Joris van Rantwijk 9873f91e8e * Further reduction of multiplier width. 
* Add more comments.
 2016-04-14 22:49:32 +02:00
Joris van Rantwijk a3d8939440 * Add comments. 2016-04-14 00:42:58 +02:00
Joris van Rantwijk 2dbc6d44db * Reduce width of sin/cos input to multiplier by 1 bit. 
* This has no significant effect on accuracy, but reduces multiplier width.
 2016-04-14 00:05:52 +02:00
Joris van Rantwijk 9f4bb7f9b0 * Increase precision of delta_phase term by 1 bit. 
* This improves accuracy of 1st order Taylor variant to less than 1.0 lsb peak deviation.
* Add comments.
 2016-04-13 23:32:02 +02:00
Joris van Rantwijk 12b896c2df Fix mistake in Taylor correction. 
This improves accuracy, but there is probably room for further improvement by avoiding accumulation of rounding errors.
 2016-04-11 23:21:25 +02:00
Joris van Rantwijk 7de76c6696 Reduce amplitude to avoid numeric overflow. 2016-04-11 21:28:17 +02:00
Joris van Rantwijk 59ec0505ab Main VHDL file of sin/cos function core. 2016-03-24 23:32:59 +01:00