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vhdl-sincos-gen
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Reduce amplitude to avoid numeric overflow.

This commit is contained in:
Joris van Rantwijk 2016-04-11 21:28:17 +02:00
parent 0685db9d92
commit 7de76c6696
1 changed files with 1 additions and 1 deletions
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rtl/sincos_gen.vhdl
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@ -79,7 +79,7 @@ architecture rtl of sincos_gen is
begin begin
for i in 0 to table_size-1 loop for i in 0 to table_size-1 loop
sin_flt := sin(real(2*i + 1) / real(2 * table_size) * MATH_PI / 2.0); sin_flt := sin(real(2*i + 1) / real(2 * table_size) * MATH_PI / 2.0);
sin_int := integer(sin_flt * real(2**table_width - 1)); sin_int := integer(sin_flt * real(2**table_width - 2));
tbl(i) := std_logic_vector(to_unsigned(sin_int, table_width)); tbl(i) := std_logic_vector(to_unsigned(sin_int, table_width));
end loop; end loop;
return tbl; return tbl;