vhdl-sincos-gen/rtl
Joris van Rantwijk fe5dfa9133 Fix mistakes in changes related to phase_extrabits. 2016-04-20 23:46:42 +02:00
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sincos_gen.vhdl Fix mistakes in changes related to phase_extrabits. 2016-04-20 23:46:42 +02:00
sincos_gen_d18_p20.vhdl Make internal phase accuracy configurable. 2016-04-20 23:46:24 +02:00
sincos_gen_d24_p26.vhdl Make internal phase accuracy configurable. 2016-04-20 23:46:24 +02:00
test_sincos_serial.vhdl Finish synthesizable test design. 2016-04-20 23:42:30 +02:00