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Sine/cosine function core in VHDL
3 Commits 1 Branch 0 Tags 89 KiB
VHDL 88.1%
Python 10.1%
Makefile 1.7%
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Joris van Rantwijk e078fffd3e Test bench for sincos_gen_d18_p20. 2016-03-24 23:37:00 +01:00
rtl VHDL wrapper for sin/cos function with 18-bit sin/cos, 20-bit phase. 2016-03-24 23:34:20 +01:00
sim Test bench for sincos_gen_d18_p20. 2016-03-24 23:37:00 +01:00