joris
/
vhdl-sincos-gen
1
0
Fork 0
Code Issues Pull Requests Activity
Sine/cosine function core in VHDL
15 Commits 1 Branch 0 Tags 89 KiB
VHDL 88.1%
Python 10.1%
Makefile 1.7%
Go to file
Joris van Rantwijk d2a948f34e * Fix mistake in 2nd order Taylor correction. 
* Fix mistake in testbench for 24-bit sine generator.
 		2016-04-14 23:14:58 +02:00
rtl * Fix mistake in 2nd order Taylor correction. 2016-04-14 23:14:58 +02:00
sim * Fix mistake in 2nd order Taylor correction. 2016-04-14 23:14:58 +02:00