vhdl-sincos-gen/rtl
Joris van Rantwijk ba096abf16 Make internal phase accuracy configurable.
* Add generic "phase_extrabits" to set internal accuracy of phase remainder.
* Increase default value of phase_extrabits from 1 to 2.
2016-04-20 23:46:24 +02:00
..
sincos_gen.vhdl Make internal phase accuracy configurable. 2016-04-20 23:46:24 +02:00
sincos_gen_d18_p20.vhdl Make internal phase accuracy configurable. 2016-04-20 23:46:24 +02:00
sincos_gen_d24_p26.vhdl Make internal phase accuracy configurable. 2016-04-20 23:46:24 +02:00
test_sincos_serial.vhdl Finish synthesizable test design. 2016-04-20 23:42:30 +02:00