Joris van Rantwijk 8719b47c6f Finish synthesizable test design. ... Finish implementation of test_sincos_serial. It has not been tested at all yet.		2016-04-20 23:42:30 +02:00
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sincos_gen.vhdl	* Finally found a way to describe the lookup table such that both	2016-04-19 23:36:10 +02:00
sincos_gen_d18_p20.vhdl	* Reorganize comments at top of wrappers for sin/cos generator.	2016-04-16 22:16:20 +02:00
sincos_gen_d24_p26.vhdl	* Reorganize comments at top of wrappers for sin/cos generator.	2016-04-16 22:16:20 +02:00
test_sincos_serial.vhdl	Finish synthesizable test design.	2016-04-20 23:42:30 +02:00