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vhdl-sincos-gen
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7703971a4d
vhdl-sincos-gen
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sim
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Joris van Rantwijk
7703971a4d
Add Makefile for simulation with GHDL.
2016-03-24 23:55:32 +01:00
..
Makefile
Add Makefile for simulation with GHDL.
2016-03-24 23:55:32 +01:00
sim_sincos_d18_p20_probe.vhdl
Test bench for sincos_gen_d18_p20.
2016-03-24 23:37:00 +01:00