38 lines
1.1 KiB
Makefile
38 lines
1.1 KiB
Makefile
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GHDL = ghdl
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GHDLFLAGS =
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.PHONY: all
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all: sim_sincos_d18_p20_probe sim_sincos_d18_p20_full \
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sim_sincos_d24_p26_probe sim_sincos_d24_p26_full
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sim_sincos_d18_p20_probe: sim_sincos_d18_p20_probe.o sincos_gen_d18_p20.o sincos_gen.o
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sim_sincos_d18_p20_probe.o: sim_sincos_d18_p20_probe.vhdl sincos_gen_d18_p20.o
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sim_sincos_d18_p20_full: sim_sincos_d18_p20_full.o sincos_gen_d18_p20.o sincos_gen.o
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sim_sincos_d18_p20_full.o: sim_sincos_d18_p20_full.vhdl sincos_gen_d18_p20.o
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sim_sincos_d24_p26_probe: sim_sincos_d24_p26_probe.o sincos_gen_d24_p26.o sincos_gen.o
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sim_sincos_d24_p26_probe.o: sim_sincos_d24_p26_probe.vhdl sincos_gen_d24_p26.o
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sim_sincos_d24_p26_full: sim_sincos_d24_p26_full.o sincos_gen_d24_p26.o sincos_gen.o
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sim_sincos_d24_p26_full.o: sim_sincos_d24_p26_full.vhdl sincos_gen_d24_p26.o
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sincos_gen.o: ../rtl/sincos_gen.vhdl
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sincos_gen_d18_p20.o: ../rtl/sincos_gen_d18_p20.vhdl sincos_gen.o
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sincos_gen_d24_p26.o: ../rtl/sincos_gen_d24_p26.vhdl sincos_gen.o
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sim_%: sim_%.o
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$(GHDL) $(GHDLFLAGS) -e $@
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%.o: ../rtl/%.vhdl
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$(GHDL) $(GHDLFLAGS) -a $<
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%.o: %.vhdl
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$(GHDL) $(GHDLFLAGS) -a $<
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.PHONY: clean
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clean:
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$(GHDL) --remove
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