192 lines
13 KiB
XML
192 lines
13 KiB
XML
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
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<generated_project xmlns="http://www.xilinx.com/XMLSchema" xmlns:xil_pn="http://www.xilinx.com/XMLSchema">
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<!-- -->
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<!-- For tool use only. Do not edit. -->
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<!-- -->
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<!-- ProjectNavigator created generated project file. -->
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<!-- For use in tracking generated file and other information -->
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<!-- allowing preservation of process status. -->
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<!-- -->
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<!-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. -->
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<version xmlns="http://www.xilinx.com/XMLSchema">11.1</version>
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<sourceproject xmlns="http://www.xilinx.com/XMLSchema" xil_pn:fileType="FILE_XISE" xil_pn:name="test_sincos.xise"/>
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<files xmlns="http://www.xilinx.com/XMLSchema">
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<file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="_ngo"/>
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<file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/bitgen.xmsgs"/>
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<file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/map.xmsgs"/>
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<file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
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<file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/par.xmsgs"/>
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<file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/trce.xmsgs"/>
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<file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/xst.xmsgs"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_BITGEN_REPORT" xil_pn:name="top_test_sincos.bgn" xil_pn:subbranch="FPGAConfiguration"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_BIT" xil_pn:name="top_test_sincos.bit" xil_pn:subbranch="FPGAConfiguration"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGDBUILD_LOG" xil_pn:name="top_test_sincos.bld"/>
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<file xil_pn:fileType="FILE_CMD_LOG" xil_pn:name="top_test_sincos.cmd_log"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_BITGEN_DRC" xil_pn:name="top_test_sincos.drc" xil_pn:subbranch="FPGAConfiguration"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_LSO" xil_pn:name="top_test_sincos.lso"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NCD" xil_pn:name="top_test_sincos.ncd" xil_pn:subbranch="Par"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGC" xil_pn:name="top_test_sincos.ngc"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGD" xil_pn:name="top_test_sincos.ngd"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGR" xil_pn:name="top_test_sincos.ngr"/>
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<file xil_pn:fileType="FILE_PAD_MISC" xil_pn:name="top_test_sincos.pad"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PAR_REPORT" xil_pn:name="top_test_sincos.par" xil_pn:subbranch="Par"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PCF" xil_pn:name="top_test_sincos.pcf" xil_pn:subbranch="Map"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="top_test_sincos.prj"/>
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<file xil_pn:fileType="FILE_TRCE_MISC" xil_pn:name="top_test_sincos.ptwx"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_STX" xil_pn:name="top_test_sincos.stx"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_REPORT" xil_pn:name="top_test_sincos.syr"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_TIMING_TXT_REPORT" xil_pn:name="top_test_sincos.twr" xil_pn:subbranch="Par"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_TIMING_XML_REPORT" xil_pn:name="top_test_sincos.twx" xil_pn:subbranch="Par"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_UNROUTES" xil_pn:name="top_test_sincos.unroutes" xil_pn:subbranch="Par"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_BITGEN_REPORT" xil_pn:name="top_test_sincos.ut" xil_pn:subbranch="FPGAConfiguration"/>
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<file xil_pn:fileType="FILE_XPI" xil_pn:name="top_test_sincos.xpi"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST" xil_pn:name="top_test_sincos.xst"/>
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<file xil_pn:fileType="FILE_HTML" xil_pn:name="top_test_sincos_envsettings.html"/>
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<file xil_pn:fileType="FILE_NCD" xil_pn:name="top_test_sincos_guide.ncd" xil_pn:origination="imported"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_MAP_REPORT" xil_pn:name="top_test_sincos_map.map" xil_pn:subbranch="Map"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_MAP_REPORT" xil_pn:name="top_test_sincos_map.mrp" xil_pn:subbranch="Map"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NCD" xil_pn:name="top_test_sincos_map.ncd" xil_pn:subbranch="Map"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGM" xil_pn:name="top_test_sincos_map.ngm" xil_pn:subbranch="Map"/>
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<file xil_pn:fileType="FILE_XRPT" xil_pn:name="top_test_sincos_map.xrpt"/>
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<file xil_pn:fileType="FILE_XRPT" xil_pn:name="top_test_sincos_ngdbuild.xrpt"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PAD_EXCEL_REPORT" xil_pn:name="top_test_sincos_pad.csv" xil_pn:subbranch="Par"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PAD_TXT_REPORT" xil_pn:name="top_test_sincos_pad.txt" xil_pn:subbranch="Par"/>
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<file xil_pn:fileType="FILE_XRPT" xil_pn:name="top_test_sincos_par.xrpt"/>
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<file xil_pn:fileType="FILE_HTML" xil_pn:name="top_test_sincos_summary.html"/>
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<file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="top_test_sincos_summary.xml"/>
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<file xil_pn:fileType="FILE_WEBTALK" xil_pn:name="top_test_sincos_usage.xml"/>
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<file xil_pn:fileType="FILE_XRPT" xil_pn:name="top_test_sincos_xst.xrpt"/>
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<file xil_pn:fileType="FILE_HTML" xil_pn:name="usage_statistics_webtalk.html"/>
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<file xil_pn:fileType="FILE_LOG" xil_pn:name="webtalk.log"/>
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<file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="webtalk_pn.xml"/>
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<file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="xlnx_auto_0_xdb"/>
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<file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="xst"/>
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</files>
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<transforms xmlns="http://www.xilinx.com/XMLSchema">
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<transform xil_pn:end_ts="1461310404" xil_pn:name="TRAN_copyInitialToXSTAbstractSynthesis" xil_pn:start_ts="1461310404">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="ReadyToRun"/>
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</transform>
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<transform xil_pn:end_ts="1461346674" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="-1544048785962338122" xil_pn:start_ts="1461346674">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="ReadyToRun"/>
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</transform>
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<transform xil_pn:end_ts="1461346674" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="6687268679030817511" xil_pn:start_ts="1461346674">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="ReadyToRun"/>
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</transform>
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<transform xil_pn:end_ts="1461310404" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1461310404">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="ReadyToRun"/>
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</transform>
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<transform xil_pn:end_ts="1461346674" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="1379793326671312440" xil_pn:start_ts="1461346674">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="ReadyToRun"/>
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</transform>
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<transform xil_pn:end_ts="1461310404" xil_pn:name="TRAN_SubProjectPreToStructuralProxy" xil_pn:prop_ck="8977612015756273942" xil_pn:start_ts="1461310404">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="ReadyToRun"/>
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</transform>
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<transform xil_pn:end_ts="1461346674" xil_pn:name="TRAN_platgen" xil_pn:prop_ck="-3262842109162067599" xil_pn:start_ts="1461346674">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="ReadyToRun"/>
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</transform>
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<transform xil_pn:end_ts="1461403854" xil_pn:in_ck="2072574044500593778" xil_pn:name="TRANEXT_xstsynthesize_spartan6" xil_pn:prop_ck="8668749107623387584" xil_pn:start_ts="1461403839">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="WarningsGenerated"/>
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<status xil_pn:value="ReadyToRun"/>
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<status xil_pn:value="OutOfDateForOutputs"/>
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<status xil_pn:value="OutputChanged"/>
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<outfile xil_pn:name="_xmsgs/xst.xmsgs"/>
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<outfile xil_pn:name="top_test_sincos.lso"/>
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<outfile xil_pn:name="top_test_sincos.ngc"/>
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<outfile xil_pn:name="top_test_sincos.ngr"/>
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<outfile xil_pn:name="top_test_sincos.prj"/>
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<outfile xil_pn:name="top_test_sincos.stx"/>
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<outfile xil_pn:name="top_test_sincos.syr"/>
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<outfile xil_pn:name="top_test_sincos.xst"/>
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<outfile xil_pn:name="top_test_sincos_xst.xrpt"/>
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<outfile xil_pn:name="webtalk_pn.xml"/>
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<outfile xil_pn:name="xst"/>
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</transform>
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<transform xil_pn:end_ts="1461400807" xil_pn:in_ck="141509727442713" xil_pn:name="TRAN_compileBCD2" xil_pn:prop_ck="7075349975164966765" xil_pn:start_ts="1461400807">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="ReadyToRun"/>
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</transform>
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<transform xil_pn:end_ts="1461403860" xil_pn:in_ck="-1047380743607608193" xil_pn:name="TRANEXT_ngdbuild_FPGA" xil_pn:prop_ck="392032481918333458" xil_pn:start_ts="1461403854">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="ReadyToRun"/>
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<outfile xil_pn:name="_ngo"/>
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<outfile xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
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<outfile xil_pn:name="top_test_sincos.bld"/>
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<outfile xil_pn:name="top_test_sincos.ngd"/>
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<outfile xil_pn:name="top_test_sincos_ngdbuild.xrpt"/>
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</transform>
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<transform xil_pn:end_ts="1461403888" xil_pn:in_ck="-1047380743607608192" xil_pn:name="TRANEXT_map_spartan6" xil_pn:prop_ck="4245753365082497697" xil_pn:start_ts="1461403860">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="WarningsGenerated"/>
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<status xil_pn:value="ReadyToRun"/>
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<status xil_pn:value="OutOfDateForOutputs"/>
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<status xil_pn:value="OutputChanged"/>
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<outfile xil_pn:name="_xmsgs/map.xmsgs"/>
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<outfile xil_pn:name="top_test_sincos.pcf"/>
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<outfile xil_pn:name="top_test_sincos_map.map"/>
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<outfile xil_pn:name="top_test_sincos_map.mrp"/>
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<outfile xil_pn:name="top_test_sincos_map.ncd"/>
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<outfile xil_pn:name="top_test_sincos_map.ngm"/>
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<outfile xil_pn:name="top_test_sincos_map.xrpt"/>
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<outfile xil_pn:name="top_test_sincos_summary.xml"/>
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<outfile xil_pn:name="top_test_sincos_usage.xml"/>
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="WarningsGenerated"/>
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<status xil_pn:value="ReadyToRun"/>
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<outfile xil_pn:name="_xmsgs/par.xmsgs"/>
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<outfile xil_pn:name="top_test_sincos.ncd"/>
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<outfile xil_pn:name="top_test_sincos.pad"/>
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<outfile xil_pn:name="top_test_sincos.par"/>
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<outfile xil_pn:name="top_test_sincos.ptwx"/>
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<outfile xil_pn:name="top_test_sincos.unroutes"/>
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<outfile xil_pn:name="top_test_sincos.xpi"/>
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<outfile xil_pn:name="top_test_sincos_pad.csv"/>
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<outfile xil_pn:name="top_test_sincos_pad.txt"/>
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<outfile xil_pn:name="top_test_sincos_par.xrpt"/>
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<transform xil_pn:end_ts="1461403932" xil_pn:in_ck="4016941542054796675" xil_pn:name="TRANEXT_bitFile_spartan6" xil_pn:prop_ck="97434230493978268" xil_pn:start_ts="1461403915">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="ReadyToRun"/>
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<outfile xil_pn:name="_xmsgs/bitgen.xmsgs"/>
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<outfile xil_pn:name="top_test_sincos.bgn"/>
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<outfile xil_pn:name="top_test_sincos.bit"/>
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<outfile xil_pn:name="top_test_sincos.drc"/>
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<outfile xil_pn:name="top_test_sincos.ut"/>
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<outfile xil_pn:name="usage_statistics_webtalk.html"/>
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<outfile xil_pn:name="webtalk.log"/>
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<outfile xil_pn:name="webtalk_pn.xml"/>
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<transform xil_pn:end_ts="1461403915" xil_pn:in_ck="-1047380743607608324" xil_pn:name="TRAN_postRouteTrce" xil_pn:prop_ck="445577401284416185" xil_pn:start_ts="1461403907">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="ReadyToRun"/>
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<outfile xil_pn:name="_xmsgs/trce.xmsgs"/>
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<outfile xil_pn:name="top_test_sincos.twx"/>
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