vhdl-sincos-gen/synth/xilinx_spartan6/sincos.gise

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<outfile xil_pn:name="sincos_gen_d18_p20.lso"/>
<outfile xil_pn:name="sincos_gen_d18_p20.ngc"/>
<outfile xil_pn:name="sincos_gen_d18_p20.ngr"/>
<outfile xil_pn:name="sincos_gen_d18_p20.prj"/>
<outfile xil_pn:name="sincos_gen_d18_p20.stx"/>
<outfile xil_pn:name="sincos_gen_d18_p20.syr"/>
<outfile xil_pn:name="sincos_gen_d18_p20.xst"/>
<outfile xil_pn:name="sincos_gen_d18_p20_xst.xrpt"/>
<outfile xil_pn:name="webtalk_pn.xml"/>
<outfile xil_pn:name="xst"/>
</transform>
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<transform xil_pn:end_ts="1461100571" xil_pn:in_ck="7367196564826055089" xil_pn:name="TRAN_compileBCD2" xil_pn:prop_ck="-6756878091118191246" xil_pn:start_ts="1461100571">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
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<transform xil_pn:end_ts="1461100575" xil_pn:in_ck="-4712295735511276190" xil_pn:name="TRANEXT_ngdbuild_FPGA" xil_pn:prop_ck="3858354792276142743" xil_pn:start_ts="1461100571">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
<outfile xil_pn:name="_ngo"/>
<outfile xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
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<outfile xil_pn:name="sincos_gen_d18_p20.bld"/>
<outfile xil_pn:name="sincos_gen_d18_p20.ngd"/>
<outfile xil_pn:name="sincos_gen_d18_p20_ngdbuild.xrpt"/>
</transform>
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<transform xil_pn:end_ts="1461100589" xil_pn:in_ck="8453365223204692366" xil_pn:name="TRANEXT_map_spartan6" xil_pn:prop_ck="4245753365082497697" xil_pn:start_ts="1461100575">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
<outfile xil_pn:name="_xmsgs/map.xmsgs"/>
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<outfile xil_pn:name="sincos_gen_d18_p20.pcf"/>
<outfile xil_pn:name="sincos_gen_d18_p20_map.map"/>
<outfile xil_pn:name="sincos_gen_d18_p20_map.mrp"/>
<outfile xil_pn:name="sincos_gen_d18_p20_map.ncd"/>
<outfile xil_pn:name="sincos_gen_d18_p20_map.ngm"/>
<outfile xil_pn:name="sincos_gen_d18_p20_map.xrpt"/>
<outfile xil_pn:name="sincos_gen_d18_p20_summary.xml"/>
<outfile xil_pn:name="sincos_gen_d18_p20_usage.xml"/>
</transform>
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<transform xil_pn:end_ts="1461100607" xil_pn:in_ck="6682508134343866937" xil_pn:name="TRANEXT_par_spartan6" xil_pn:prop_ck="-3829590541433901613" xil_pn:start_ts="1461100589">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="WarningsGenerated"/>
<status xil_pn:value="ReadyToRun"/>
<outfile xil_pn:name="_xmsgs/par.xmsgs"/>
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<outfile xil_pn:name="sincos_gen_d18_p20.ncd"/>
<outfile xil_pn:name="sincos_gen_d18_p20.pad"/>
<outfile xil_pn:name="sincos_gen_d18_p20.par"/>
<outfile xil_pn:name="sincos_gen_d18_p20.ptwx"/>
<outfile xil_pn:name="sincos_gen_d18_p20.unroutes"/>
<outfile xil_pn:name="sincos_gen_d18_p20.xpi"/>
<outfile xil_pn:name="sincos_gen_d18_p20_pad.csv"/>
<outfile xil_pn:name="sincos_gen_d18_p20_pad.txt"/>
<outfile xil_pn:name="sincos_gen_d18_p20_par.xrpt"/>
</transform>
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<transform xil_pn:end_ts="1461100607" xil_pn:in_ck="-6631160144728170878" xil_pn:name="TRAN_postRouteTrce" xil_pn:prop_ck="445577401284416185" xil_pn:start_ts="1461100602">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
<outfile xil_pn:name="_xmsgs/trce.xmsgs"/>
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<outfile xil_pn:name="sincos_gen_d18_p20.twr"/>
<outfile xil_pn:name="sincos_gen_d18_p20.twx"/>
</transform>
</transforms>
</generated_project>