From 8cf9ca1673a9d7befbd1c77140c8dfe70f171b0b Mon Sep 17 00:00:00 2001 From: Joris van Rantwijk Date: Sat, 12 Nov 2016 23:01:49 +0100 Subject: [PATCH] Rename entities of top-level synthesis wrappers. Two entities named 'top' causes problems for the synthesizer. --- synth/top_mt19937.vhdl | 6 +++--- synth/top_xoroshiro.vhdl | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/synth/top_mt19937.vhdl b/synth/top_mt19937.vhdl index 858a3f6..7159175 100644 --- a/synth/top_mt19937.vhdl +++ b/synth/top_mt19937.vhdl @@ -2,16 +2,16 @@ library ieee; use ieee.std_logic_1164.all; -entity top is +entity topmt is port ( clk : in std_logic; rst : in std_logic; ready: in std_logic; valid: out std_logic; data: out std_logic_vector(31 downto 0) ); -end top; +end topmt; -architecture arch of top is +architecture arch of topmt is begin inst_prng: entity work.rng_mt19937 diff --git a/synth/top_xoroshiro.vhdl b/synth/top_xoroshiro.vhdl index f7e1f39..309e69a 100644 --- a/synth/top_xoroshiro.vhdl +++ b/synth/top_xoroshiro.vhdl @@ -2,16 +2,16 @@ library ieee; use ieee.std_logic_1164.all; -entity top is +entity topxs is port ( clk : in std_logic; rst : in std_logic; ready: in std_logic; valid: out std_logic; data: out std_logic_vector(63 downto 0) ); -end top; +end topxs; -architecture arch of top is +architecture arch of topxs is begin inst_prng: entity work.rng_xoroshiro128plus