diff --git a/rtl/xoroshiro128plus.vhdl b/rtl/xoroshiro128plus.vhdl index 575b29b..d3c24a6 100644 --- a/rtl/xoroshiro128plus.vhdl +++ b/rtl/xoroshiro128plus.vhdl @@ -14,8 +14,8 @@ -- to initialize the generator at reset. The generator also supports -- re-seeding at run time. -- --- After reset, at least one enabled clock cycle is needed before --- a random number appears on the output. +-- After reset, at least one clock cycle is needed before valid +-- random data appears on the output. -- -- NOTE: This is not a cryptographic random number generator. -- @@ -23,6 +23,17 @@ -- all other output bits. -- +-- +-- Copyright (C) 2016 Joris van Rantwijk +-- +-- This code is free software; you can redistribute it and/or +-- modify it under the terms of the GNU Lesser General Public +-- License as published by the Free Software Foundation; either +-- version 2.1 of the License, or (at your option) any later version. +-- +-- See +-- + library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all;