From b445abd149f5970f4c6a663e287c083b2f6ee96b Mon Sep 17 00:00:00 2001 From: Joris van Rantwijk Date: Thu, 10 Oct 2024 21:17:21 +0200 Subject: [PATCH] Double internal RAM for 4-input board Double the size of the RAM buffer before DMA for analog sample data. This makes room for 16k samples in 4-channel mode (or 32k samples in 2-channel mode). --- fpga/rtl/puzzlefw_pkg.vhd | 2 +- fpga/rtl/puzzlefw_top_4ch.vhd | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/fpga/rtl/puzzlefw_pkg.vhd b/fpga/rtl/puzzlefw_pkg.vhd index 70534ce..acdc623 100644 --- a/fpga/rtl/puzzlefw_pkg.vhd +++ b/fpga/rtl/puzzlefw_pkg.vhd @@ -96,7 +96,7 @@ package puzzlefw_pkg is -- Firmware info word. constant fw_api_version: natural := 1; constant fw_version_major: natural := 0; - constant fw_version_minor: natural := 14; + constant fw_version_minor: natural := 15; constant fw_info_word: std_logic_vector(31 downto 0) := x"4a" & std_logic_vector(to_unsigned(fw_api_version, 8)) diff --git a/fpga/rtl/puzzlefw_top_4ch.vhd b/fpga/rtl/puzzlefw_top_4ch.vhd index 17bcfc9..f8dd2a7 100644 --- a/fpga/rtl/puzzlefw_top_4ch.vhd +++ b/fpga/rtl/puzzlefw_top_4ch.vhd @@ -477,7 +477,7 @@ begin inst_acq_dma: entity work.dma_write_channel generic map ( transfer_size_bits => 4, - queue_size_bits => 14, + queue_size_bits => 15, idle_timeout => 256 ) port map ( clk => clk_adc,